Blog
- Compile Once, Run Anywhere
Your model rarely picks its chip, and it may have to run on several. One TiGrIS plan produces identical output, down to the bit, across three different Cortex-M cores.
- Static Memory Planning for Embedded Neural Network Inference
Peak working memory depends on the execution schedule and allocation, so the schedule can be optimized ahead of time and executed with bounded runtime arenas.
- Introducing TiGrIS
The model of your choice doesn't fit in SRAM. You consider reducing its size or using a different model. TiGrIS tiles the computation instead and makes the exact model run on your target hardware.
- YOLOv5n on ESP32-S3: Object Detection on a $10 MCU
800KB peak activations. 512KB of SRAM. Tiling makes it work — 11 seconds to inference.