TiGrIS

Choosing a Kernel Backend

TiGrIS plans are target-independent. The backend selected with tigris codegen chooses the kernels used by the generated integration code; it does not change the model or plan format.

For initial integration and host testing, use reference. For an int8 deployment, select esp-nn on ESP32-S3 or cmsis-nn on Cortex-M. Both accelerated backends fall back to TiGrIS’s portable int8 kernels when a vendor kernel cannot preserve the plan’s semantics.

At a glance

--backendIntended targetFloat32 planInt8 plan
referencePOSIX, tests, portable deploymentsPortable CPortable C
esp-nnESP32-S3Portable CESP-NN with portable fallback
cmsis-nnArm Cortex-MPortable CCMSIS-NN with portable fallback

ESP-NN and CMSIS-NN accelerate int8 only. Selecting either for a float32 plan explicitly uses the portable float implementation.

Supported operators

The table covers operators that may remain after TiGrIS normalizes an ONNX graph. Native means the vendor library is normally used. Portable fallback remains supported but does not receive vendor acceleration.

Executable operators after graph normalization
OperatorPortable CESP-NNCMSIS-NN
ConvFloat32 + int8Native*Native*
DepthwiseConvFloat32 + int8Native*Native*
ReluFloat32 + int8Portable fallbackPortable fallback
Relu6Float32 + int8Portable fallbackPortable fallback
MaxPoolFloat32 + int8Portable fallbackPortable fallback
AveragePoolFloat32 + int8Native*Native*
AddFloat32 + int8Portable fallbackPortable fallback
MulFloat32 + int8Portable fallbackPortable fallback
GemmFloat32 + int8NativeNative
SoftmaxFloat32 + int8Portable fallbackPortable fallback
SigmoidFloat32 + int8Portable fallbackPortable fallback
ConcatFloat32 + int8Portable fallbackPortable fallback
GlobalAveragePoolFloat32 + int8Portable fallbackNative*
FlattenFloat32 + int8Portable fallbackPortable fallback
ReshapeFloat32 + int8Portable fallbackPortable fallback
TanhFloat32 + int8Portable fallbackPortable fallback
TransposeFloat32 + int8Portable fallbackPortable fallback
ResizeFloat32 + int8Portable fallbackPortable fallback
Conv1DFloat32 + int8Portable fallbackPortable fallback

Important operator limits

The matrix uses the runtime’s NLC/NHWC layouts. For rank-3 and rank-4 ONNX activations, the channel axis becomes the runtime’s final dimension; this is the supported Softmax axis.

OperatorImplemented form
MaxPoolexplicit padding, floor output sizing, unit dilation, and no indices output
AveragePoolexplicit padding, floor output sizing, unit dilation, and count_include_pad=0
Adddynamic operands must have identical shapes; no general broadcasting
Muldynamic operands must have identical shapes; no general broadcasting
Softmaxfinal axis only; untiled execution
Concatrank-4 channel-axis concatenation
Transposea concrete, valid permutation is stored in schema 4 plans
Resizerank-4 nearest-neighbor integer H/W upscaling

When native acceleration falls back

An asterisk in the support table means the vendor adapter is used for the common case, while these variants deliberately take the portable int8 path:

BackendOperatorFallback condition
cmsis-nnConvfalls back when tiled; non-tiled dilation remains native
esp-nnConvfalls back for dilation other than 1; asymmetric padding falls back when its preparation-time workspace is insufficient
cmsis-nnDepthwiseConvfalls back when tiled; non-tiled dilation remains native
esp-nnDepthwiseConvfalls back for dilation other than 1
cmsis-nnAveragePoolfalls back when tiled or when input/output quantization differs
esp-nnAveragePoolfalls back when tiled or when input/output quantization differs
cmsis-nnGlobalAveragePoolfalls back when tiled or when input/output quantization differs

Operators not directly executable

These names have reserved plan opcodes but no kernel route. Normalization may fold or rewrite some of them; code generation rejects a plan if one remains:

Clip, Pad, Sub, Div, LeakyRelu, BatchNormalization, InstanceNormalization, ConvTranspose, MatMul, ReduceMean, Squeeze, Unsqueeze, GlobalMaxPool.

The compiler still validates each model’s shapes, attributes, quantization, tiling, and memory requirements. A listed operator does not imply support for every ONNX attribute combination.

Keeping this page accurate

The tables are rendered from the compiler’s generated capability contract. Documentation CI compares its copy byte-for-byte with compiler develop, and compiler and runtime CI independently compare the same contract with all four runtime dispatchers.

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