Title here
Summary here
Choosing a Kernel Backend
TiGrIS plans are target-independent. The backend selected with tigris codegen
chooses the kernels used by the generated integration code; it does not change
the model or plan format.
For initial integration and host testing, use reference. For an int8 deployment,
select esp-nn on ESP32-S3 or cmsis-nn on Cortex-M. Both accelerated backends
fall back to TiGrIS’s portable int8 kernels when a vendor kernel cannot preserve
the plan’s semantics.
At a glance
--backend | Intended target | Float32 plan | Int8 plan |
|---|---|---|---|
reference | POSIX, tests, portable deployments | Portable C | Portable C |
esp-nn | ESP32-S3 | Portable C | ESP-NN with portable fallback |
cmsis-nn | Arm Cortex-M | Portable C | CMSIS-NN with portable fallback |
ESP-NN and CMSIS-NN accelerate int8 only. Selecting either for a float32 plan explicitly uses the portable float implementation.
Supported operators
The table covers operators that may remain after TiGrIS normalizes an ONNX graph. Native means the vendor library is normally used. Portable fallback remains supported but does not receive vendor acceleration.
| Operator | Portable C | ESP-NN | CMSIS-NN |
|---|---|---|---|
Conv | Float32 + int8 | Native* | Native* |
DepthwiseConv | Float32 + int8 | Native* | Native* |
Relu | Float32 + int8 | Portable fallback | Portable fallback |
Relu6 | Float32 + int8 | Portable fallback | Portable fallback |
MaxPool | Float32 + int8 | Portable fallback | Portable fallback |
AveragePool | Float32 + int8 | Native* | Native* |
Add | Float32 + int8 | Portable fallback | Portable fallback |
Mul | Float32 + int8 | Portable fallback | Portable fallback |
Gemm | Float32 + int8 | Native | Native |
Softmax | Float32 + int8 | Portable fallback | Portable fallback |
Sigmoid | Float32 + int8 | Portable fallback | Portable fallback |
Concat | Float32 + int8 | Portable fallback | Portable fallback |
GlobalAveragePool | Float32 + int8 | Portable fallback | Native* |
Flatten | Float32 + int8 | Portable fallback | Portable fallback |
Reshape | Float32 + int8 | Portable fallback | Portable fallback |
Tanh | Float32 + int8 | Portable fallback | Portable fallback |
Transpose | Float32 + int8 | Portable fallback | Portable fallback |
Resize | Float32 + int8 | Portable fallback | Portable fallback |
Conv1D | Float32 + int8 | Portable fallback | Portable fallback |
Important operator limits
The matrix uses the runtime’s NLC/NHWC layouts. For rank-3 and rank-4 ONNX activations, the channel axis becomes the runtime’s final dimension; this is the supported Softmax axis.
| Operator | Implemented form |
|---|---|
Relu | rank-3 pointwise length tiling on serialized axis 1 |
Relu6 | rank-3 pointwise length tiling on serialized axis 1 |
MaxPool | explicit padding, floor output sizing, unit dilation, and no indices output |
AveragePool | explicit padding, floor output sizing, unit dilation, and count_include_pad=0 |
Add | dynamic operands must have identical shapes; no general broadcasting |
Add | standalone rank-3 pointwise length tiling on serialized axis 1 |
Mul | dynamic operands must have identical shapes; no general broadcasting |
Mul | standalone rank-3 pointwise length tiling on serialized axis 1 |
Softmax | final axis only; untiled execution |
Sigmoid | rank-3 pointwise length tiling on serialized axis 1 |
Concat | rank-4 channel-axis concatenation |
GlobalAveragePool | untiled execution |
Tanh | rank-3 pointwise length tiling on serialized axis 1 |
Transpose | a concrete, valid permutation is stored in schema 4+ plans |
Resize | rank-4 nearest-neighbor integer H/W upscaling; untiled execution |
Conv1D | standalone rank-3 length tiling on serialized axis 1; may compose with shape-preserving unary pointwise operators |
When native acceleration falls back
An asterisk in the support table means the vendor adapter is used for the common case, while these variants deliberately take the portable int8 path:
| Backend | Operator | Fallback condition |
|---|---|---|
cmsis-nn | Conv | falls back when tiled; non-tiled dilation remains native |
esp-nn | Conv | falls back for dilation other than 1; asymmetric padding falls back when its preparation-time workspace is insufficient |
cmsis-nn | DepthwiseConv | falls back when tiled; non-tiled dilation remains native |
esp-nn | DepthwiseConv | falls back for dilation other than 1 |
cmsis-nn | AveragePool | falls back when tiled or when input/output quantization differs |
esp-nn | AveragePool | falls back when tiled or when input/output quantization differs |
cmsis-nn | GlobalAveragePool | falls back when tiled or when input/output quantization differs |
Operators not directly executable
These names have reserved plan opcodes but no kernel route. Normalization may fold or rewrite some of them; code generation rejects a plan if one remains:
Clip, Pad, Sub, Div, LeakyRelu, BatchNormalization, InstanceNormalization, ConvTranspose, MatMul, ReduceMean, Squeeze, Unsqueeze, GlobalMaxPool.
The compiler still validates each model’s shapes, attributes, quantization, tiling, and memory requirements. A listed operator does not imply support for every ONNX attribute combination.
Keeping this page accurate
These tables describe the currently released tigris-ml package. They are
generated from its capability contract and automatically verified against the
published package for every website release. Development CI separately checks
the next documentation state against compiler and runtime develop.
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