https://tigris-ml.dev/docs/architecture/Recent content in Architecture on TiGrISHugo -- gohugo.ioenCopyright (c) 2025-2026 raws labsMon, 01 Jan 0001 00:00:00 +0000https://tigris-ml.dev/docs/architecture/compilation-pipeline/Mon, 01 Jan 0001 00:00:00 +0000https://tigris-ml.dev/docs/architecture/compilation-pipeline/TiGrIS compiles an ONNX model into a .tgrs execution plan through seven stages. Each stage transforms the model representation, culminating in a binary that the C99 runtime executes directly on the target device.https://tigris-ml.dev/docs/architecture/tiling/Mon, 01 Jan 0001 00:00:00 +0000https://tigris-ml.dev/docs/architecture/tiling/Tiling is TiGrIS’s core technique for fitting large models into small SRAM. A Conv2D at position (x, y) reads only a local neighborhood of the input.https://tigris-ml.dev/docs/architecture/memory-model/Mon, 01 Jan 0001 00:00:00 +0000https://tigris-ml.dev/docs/architecture/memory-model/TiGrIS uses a three-region memory model designed for embedded devices with heterogeneous memory: small fast SRAM, large slow PSRAM, and read-only flash.